The development of electronic devices (or packages) is a very complex process. Typically, each device is formed by one or more integrated circuits mounted on a chip carrier. The chip carrier consists of a circuitized insulating substrate, which protects the integrated circuits from mechanical stresses and implements the required electrical connections.
In this context, several mechanical factors affect the design of the device (such as the thickness of the carrier to ensure the desired stiffness and to allow realizing the required interconnection vias through it, the possible addition of a stiffener for preventing any warp of the carrier, and the like).
Additional problems are due to the presence of multiple integrated circuits on the same carrier (generating asymmetric stresses that may involve an irregular warping of the carrier). The scenario is further complicated when discrete elements (such as capacitors or resistors) are also mounted on the carrier.
In the case of a multi-component device, a minimum gap must be ensured between each pair of adjacent components (i.e., integrated circuits or discrete elements). For example, this is necessary to allow mounting each component in the desired position (without any interference of a corresponding mounting head with the adjacent components), or to allow inserting a dispensing needle close to each integrated circuit for its underfilling. Moreover, the same gap is necessary to allow heating each (low cost) discrete element locally for removing and replacing it when defective (during a reworking of the device aimed at saving the far more expensive integrated circuits).
The position of the components on the carrier is also of the utmost importance for the reliability of the device. Indeed, it is necessary to ensure that any joints between the components and the carrier maintain their integrity, or that they remain correctly insulated (without any short circuit being created, for example, by ionic contamination, electro-migration or dendritic growth). This involves further constraints to the minimum gaps between the components. The problem is particularly acute for the discrete elements, since the integrity and the insulation of their joints strongly depends on the proximity of the stiffener or of the (larger) integrated circuits.
In any case, it is always necessary to test any new device for verifying whether it exhibits the desired features. Particularly, in the scenario at issue the test is aimed at verifying the reliability of the device (i.e., the integrity and the insulation of the joints) against mechanical and/or thermal stresses.
For this purpose, prototyping techniques are commonly used to validate the device before its actual production. A prototype consists of a physical implementation of the device (possibly simplified in some aspects not relevant to the test of interest). For example, a routing structure of the carrier is simplified by simply implementing the desired accesses to the components (without any or controlled interconnections among them). Moreover, the prototype typically replaces the real components (especially the integrated circuits in bare die format) with dummy ones known as superchips. Each superchip is dimensionally identical to the corresponding (real) integrated circuit, but with special electrical circuits that replace its application functional circuitry. For example, some terminals of the superchip are short-circuited to each other within the component.
This ensures an electrical continuity between each pair of short-circuited terminals, so as to generate a conductive path that allows measuring electrical quantities of desired patterns passing through it.
A drawback of the solutions known in the art is that they are quite rigid. Indeed, any prototyping carrier only allows testing a specific configuration of the device (with its components in specific positions).
Therefore, the device is generally designed with a conservative configuration that is likely to meet the desired reliability requirements (e.g., based on manufacturing standards commonly accepted). However, this does not allow investigating more aggressive designs (wherein the gaps between the components are further reduced below the safety margins of the manufacturing standards).
This has a detrimental impact on the whole size of the device, since it prevents the design of more compact structures (wherein the gaps between the components are actually minimized).